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Logic and Computer Design Fundamentals
3nd Edition
Mano & Kime
Pearson Prentice Hall, 2004
ISBN: 0-13-140539-X
http://www.prenhall.com/mano
http://www.cecs.csulb.edu/~rallison
The course has two components - Theory and Laboratory.
In the theory segment, we learn about designing computers (not very sophisticated ones but fairly simple ones to understand - for example Pentium computers have many hundreds of instructions. The first computer that we design has only a meager 24 instructions). In any computer design, the first step is to know the Application to which the computer will be put to use and then to select an appropriate Instruction Set. Two philosophies govern the Instruction Set architecture. They are called RISC (Reduced Instruction Set Computer) and CISC (Complex Instruction Set Computer). RISC computers use simpler instructions that can be executed fast in a single clock cycle. Also the instructions can be easily "pipelined", i.e., they can be executed in an assembly line fashion. CISC machines use complex instructions that may require multiple clock cycles. Thus the text uses another set of names for the two categories as Single Cycle and Multiple Cycle computers .
Once we decide the Instruction set, then we design the Data Path where the data will be processed and routed. We then design the Control Unit that will issue the needed control signals to the data path to orchestrate and to massage the data as required. There are two approaches in the design of Control Units. One is Hard Wired Control and the other is Micro-programmed Control.
In addition to the Processor (Control Unit and Data Path), computers will be useless unless there is Memory to store data and instructions. Memories are typically arranged in a "hierarchy". The main memory is preceded by small and fast memories called Cache and followed by large and slow memories called Virtual Memories. We hope to study the organization of these two memories in some detail (as time permits).
The last section is about I/O (Input Output Systems) and how they interact with the Processor and the Memory.
In the Lab, we model and simulate the computers we study in the theory. Obviously we cannot simulate the whole computer in the beginning. We build brick by brick incrementally. We take `baby steps'. At each step, we test the module, build another module, test it and then integrate the two modules and test the bigger module and so on. We will make certain basic 'building blocks' that get used repeatedly in computers. They are Adders, Multiplexers, Decoders, Registers, and Counters. (Please review the material from the Logic Design course (CECS 201).
We build the ALSU (Arithmetic Logic Shift Unit) first, then the Register File, and then combine both of them to form a Data Path, add Memory, build the Control Unit and combine the Data Path and Control Unit to form the whole CPU!
The Hardware Description Language (HDL) that we use to describe and simulate the hardware is Verilog (Verilog is part of the different design tools provided by Cadence). The Cadence server runs Unix operating system and has a text editor called pico (in addition to vi). The first Lab (called Lab0) will make us familiar with these tools.
Dr. Michael Chelian
Spring 2008