| CECS 531- Advanced Computer Architecture II | Home |
Computer Architecture: A Quantitative Approach
Hennessy & Patterson, 4th Edition
Morgan-Kauffman, 2007
ISBN: 978-0-12-370490-0
http://books.elsevier.com/us//mk/us/
1. “Computer Organization and Design”, Patterson & Hennessy , 4th edition, Morgan Kaufmann, 2008
2. “Logic and Computer Design Fundamentals”, Mano & Kime, 4th Edition, Prentice Hall, 2008
In the first course, we studied about how performance of computers are improved at instruction level and at processor level inside. In this course, we move up to improve the performance at the Multiple processor level. We will study how processors are interconnected in a computer and how computers are interconnected as networks or clusters to give greater performance. Memory hierarchy is another technique used for speed-up and we will learn about the three different levels in the memory hierarchy.
We will be studying Multiprocessors - how memory can be shared between them, how we can keep the memory consistent and how we can pass messages and synchronize the operations between processors. The next topic is interconnection of computers. There are many network topologies: crossbar, tree, ring and mesh – to name a few. We also discuss clusters used for data bases and web servers. Interconnection of computers can be extended at various levels – locally, in wider area and then globally.
We then move on to Memory hierarchy which is another technique used to speed up processors. The hierarchy consists of cache memory, main memory and virtual memory. We will study how cache is organized and then study how to hit the cache faster, how to reduce the miss rate and how to reduce the miss penalty. We will do some performance calculations. We will then study how main memory’s bandwidth can be increased. We will then discuss how virtual memory is mapped to physical memory. Other issues in virtual memory are implementing protection and using translation look aside buffer for faster access.
Dr. Michael Chelian
Fall 2009